Computing’s carbon footprint is growing at an unsustainable rate. To overcome this global challenge, researchers and professionals are exploring techniques to reduce the total carbon footprint of computing systems across their entire lifetime, considering both embodied carbon (due to emissions during manufacturing) and operational carbon (from day-to-day use.) This represents a paradigm shift in humanity’s approach to designing computing systems, evolving from energy-efficient design (balancing performance and energy consumption) to carbon-efficient design (balancing performance and total carbon footprint). While today’s efforts in carbon-efficient computing are essential, many of them focus on today’s silicon-based technologies, and thus do not fully capture the wide range of future beyond-silicon technologies that are actively being investigated for future directions in energy-efficient computing. In particular, monolithic three-dimensional integrated circuits (3D ICs), which have multiple layers of computing and memory circuits densely integrated directly on top of each other in three dimensions, are unmatched in their projected energy efficiency benefits. However, their implications on computing’s carbon footprint are not as well understood. This project aims to answer the following question: should monolithic 3D ICs be pursued for carbon-efficient computing, considering trade-offs in power, performance, area, operational carbon, and embodied carbon? This project also emphases two key goals in education. The first is to leverage recent developments in Augmented Reality and Virtual Reality (AR/VR) to help students visualize complex manufacturing processes for monolithic 3D ICs. The second is to instill the idea that carbon footprint is a first-class figure of merit for computing systems, alongside conventional metrics including power, performance, and area.

This project focuses on addressing three key challenges.

• Challenge 1: quantifying the embodied carbon footprint of future monolithic 3D ICs, as opposed to silicon-based ICs that are already commercially available, is particularly difficult for manufacturing processes that are not yet in production.
• Challenge 2: it is not clear which metrics (or figures of merit) designers should target for optimizing carbon efficiency, instead of energy efficiency.
• Challenge 3: there is high variability in quantifying carbon footprint, due to both
  • (a) transparency: designers may not have full access to detailed carbon emission numbers from manufacturing, and
  • (b) varying energy sources: the carbon footprint of executing a computing task varies depending on the energy source (for example, renewable versus non-renewable), which also changes over time.

The technical approach is organized across four research thrusts designed to address these three key challenges.

• Thrust 1: Modeling embodied carbon of monolithic 3D ICs comprising emerging beyond-silicon nanotechnologies.
• Thrust 2: Analyzing metrics of carbon efficiency to drive carbon-aware optimization.
• Thrust 3: Developing case studies in carbon-efficient computing.
• Thrust 4: Leveraging mathematical robust optimization techniques to design carbon-efficient computing systems even when there is uncertainty in carbon accounting.

This award reflects NSF’s statutory mission and has been deemed worthy of support through evaluation using the Foundation’s intellectual merit and broader impacts review criteria.